1. Field of the Invention
The present invention relates to a method of manufacturing a TFT substrate and a TFT substrate.
2. Description of Related Art
In recent years, liquid crystal display devices, which are characterized by their energy-saving and space-saving capabilities, have been taking the place of traditional CRTs and becoming widespread in the field of display devices using semiconductor devices. In such liquid crystal display devices, active matrix type TFT array substrates have become widely used. In a TFT array substrate, a plurality of electrodes and wirings as well as elements are provided on a transparent insulating substrate. Specifically, switching elements such as thin film transistors (TFTs) each having a scanning line and a signal line as well as a gate electrode and source/drain electrodes are arranged in an array. Further, an independent video signal is applied to an electrode of each display pixel.
The manufacturing of this active matrix type TFT array substrate requires a number of processes. Therefore, there have been problems in the productivity including increase in the number of manufacturing devices and increase in the failure occurrence rate. Conventionally, manufacturing methods in which five photolithography processes are carried out (hereinafter called “five-mask process”) have been commonly used (see, for example, Japanese Unexamined Patent Application Publication No. 11-242241).
Meanwhile, in recent years, a method in which middle-tone exposure is applied in the back channel regions of TFTs has been known as a technique for reducing the number of masks used to form a thin film transistor substrate (see, for example, Japanese Unexamined Patent Application Publication No. 2000-164886). This method is called “four-mask process”. Since the four-mask process can reduce the number of necessary masks, it is considered to be a promising technique for reducing manufacturing costs. As described above, technological development for making the four-mask process fit for practical use has been in progress.
Referring to FIGS. 13 and 14, an example of a method of manufacturing an inverted staggered TFT using the four-mask process and a structure of such a TFT is explained hereinafter. FIG. 13 is a plane view illustrating a structure of a TFT. FIG. 14 is a cross sectional view taken along the line XIV-XIV in FIG. 13.
Firstly, a gate electrode 2 is formed on the insulating substrate 1. Next, a gate insulating film 3, an intrinsic semiconductor film 4, an impurity semiconductor film 5, and a conductive film for a source line are formed in succession. Then, a resist is applied on the conductive film for a source line. After that, middle-tone exposure is performed on the resist located over the back channel formation region of a TFT. In this way, a resist having two different film-thicknesses is formed. Specifically, the resist has a thicker film-thickness in the source/drain formation regions and a thinner film-thickness in the back channel formation region.
By using this resist as a mask, the conductive film for a source line, the impurity semiconductor film 5, and the intrinsic semiconductor film 4 are successively etched. Next, the resist having the thinner film-thickness is removed, so that the conductive film for a source line located over the back channel formation region is exposed. After that, by using the remaining resist as a mask, the conductive film for a source line is etched. In this way, the conductive film for a source line is patterned into a desired shape, and thereby a source line 9, a source electrode 6, and a drain electrode 7 are formed. In the following explanation, the conductive film for a source line after the patterning is referred to as “conductive film 25”. Then, by using the remaining resist as a mask, the impurity semiconductor film 5 is etched. In this way, a back channel region 8 is formed, and the manufacturing of the TFT has been completed. Since the semiconductor film and the conductive film for a source line are formed by a single photolithography process in this manner, it is possible to reduce the number of necessary masks.
For example, in the case of a liquid crystal display device, the development of a technique for simultaneously incorporating a circuit for increasing additional value, in addition to the image displaying function, into a TFT array substrate having TFTs formed in this manner has been also in progress. Therefore, in such a TFT array substrate, the source line 9 is used not only as a line to transmit display signals but also to form a circuit for incorporating an additional function. In such a case, the source line 9 could become longer, and the number of TFT formation places per one source line 9 could be restricted.
When the number of TFT formation places for one source line 9 is too small, the metal film cannot be completely removed by etching during the formation of the back channel region 8. That is, the metal film cannot be completely removed, and could remains above the back channel region 8 in such a manner that the source electrode and the drain electrode are short-circuited, and thus causing a failure that the TFT is not formed. As a result, a part of the circuit does not operate properly, and thus reducing the yields of the products.
In an exemplary aspect, the present invention has been made in view of the above-mentioned problems, and an exemplary object of the present invention is to provide a method of manufacturing a TFT substrate and a TFT substrate capable of improving the yields and thus improving the productivity.